Alpha particles or neutron strikes can cause soft errors in a cache where a cell in the cache loses a stored charge causing a stored one to unintentionally flip to a stored zero. Since the chance of a soft error occurring in a cell increases with the amount of time the charge is stored, cache policies such as write-through mode have been used to minimize soft errors. In a write-through cache, every write to the cache also writes to main memory, which serves as a backup. However, write-through mode typically causes an unacceptable performance loss in applications such as network routers, database servers, and video game consoles.
Write-back mode is a better performing policy that does not immediately send data to memory after writing a cache entry. Instead, a tracking scheme is used to mark data stored in cache but not memory as “dirty.” Data marked as dirty is then written-back to system memory before the cache cell having the data is written over. However, since data is stored in a cache without being backed up to main memory, currently write-back mode is much more vulnerable to soft errors.
Partial solutions have been developed to reduce the susceptibility of write-back mode, including radiation hardening, adding storage for tracking parity data, and using counters to track how long a cell stores dirty data. Generally, these partial solutions require adding hardware to the processor, which causes increases in manufacturing costs. The disclosure that follows solves this and other problems.